DueProLogic USB-CPLD Development System


The DueProLogic is a complete FPGA
Development System designed to easily
get the user started learning and
creating projects.

The DueProLogic makes programmable logic easy with an all
inclusive development platform. It includes an Altera Cyclone IV FPGA,
on board programming, four megabit configuration flash, and an
SD connector for add on memory. You can create your HDL code,
program it into the flash and interact with the hardware
via a Windows PC.


DueProLogic Connected to Breadboard

This is the FPGA (Field-Programmable Gate Array) development
board and runtime environment you have been waiting for to get
started with programmable logic.

DueProLogic FPGA Development System

The DueProLogic (DPL) and its integrated development and distinctive
runtime environment has been specifically designed for Electrical
Engineering students, hobbyists, and entrepreneurs
prototyping/developing/running projects involving logic, with the added
opportunity, should it be needed for your project, of readily mating with
a widely used microprocessor board, the Arduino Due, and other ARM
Cortex compatibles. The combination of FPGA programmable logic and
microcontroller is unbeatable in an educational student learning setting
and in many other projects where each can bring its strength.

DueProLogic Diagonal Top Down

FPGA Training

The DPL gives learners the opportunity to have an appropriate hands-on
approach when learning logic, exploring different iterations of schematic/code
designs with simple uploads of the design, and the operation of those circuits
with relatively easy runtime passing of project parameters and data, and an
abundance of headers that can interface to external components, without
having to spend inordinate amounts of time reading datasheets, designing the
right combinations of gates on multi-gate chips, and
building/revising/debugging/revising repeatedly… spaghetti bowls of wires and
chips on multiple breadboards to connect to those same external components.
With the DPL’s FPGA, projects can also more easily be attempted which rely on
asynchronous, exceedingly fast, and even multiple separate concurrent logic
structures operating in parallel which would have traditionally required a
plethora of chip gates or multiple high speed microprocessors to implement
parallel processes. Logic circuits are implemented within the FPGA at few-
nanosecond gate speeds and highly parallel in operation, effectively a few
hundred MHz; Microprocessors often rely on inherently slower single threaded
program loops with interrupt servicing, which is typically much slower.
Programmable logic is today’s technology for logic learners and implementers,
replacing discrete logic chips.


FPGA Projects

The DPL allows the learner to be more productive and better focus on the
underlying logic and integration with the non-logic aspects of non-trivial
projects. Projects and solving real-world applications might involve:


  • Basic labs exploring digital design and logic devices,
    possibly interfacing to non-logic electrical
  • Embedded system controls (or simulations of common
    devices like a microwave oven)
  • Robotics and other portable/mobile projects, especially
    those that involve significant or blazingly fast
    processing and responsive DC motor control requiring
    precise timing of multiple motors concurrently
  • The mating between FPGA and microprocessor
  • 3.3V compatible Arduino shields that bring project-related
  • Add-on modules from EarthPeopleTechnology (EPT) and others
    (or your own) that bring specific project-related functionality
  • Home environmental controls
  • Video/Audio stream processing
  • Bit-coin mining
  • And other projects with a wide variety of levels of logic and
    electrical design complexity.

DueProLogic Overview

The DPL is a complete FPGA development environment. It includes a powerful
Altera Cyclone IV FPGA, High-Speed USB interface chip, Full SD Card interface
connector, and 4Mb Configuration Flash (for the FPGA). The USB interface
chip is an FT2232H with Dual Serial Channels. One channel is dedicated to
loading the configuration Flash for the FPGA. The second channel provides a
high speed interface for bi-directional communications with the FPGA. Once
the configuration Flash is loaded with the users synthesized code, a reset will
cause the FPGA to read the Flash and load up the stored image into the FPGA.


DueProLogic Hardware Overview Callouts

The block diagram shows all of the parts of the DueProLogic. There are two
main power supplies, +1.2V and +3.3V. The +1.2V powers the core of the FPGA
while the +3.3V powers the Input/Outputs of the FPGA as well as provides
power for user circuits. The DPL contains two oscillators, 66MHz and 100MHz.
The 66MHz oscillator is used to provide clocking for the EPT ActiveHost USB
communications core. The 100MHz oscillator can be used by the user clocked
up using one of the onboard Clock-DLL modules.

DueProLogic Hardware Overview Callouts

Development Environment

The DPL User Manual comes complete with instructions to set up all the
drivers, the Altera Quartus development environment, and get started creating
FPGA projects. The User Manual walks the user step by step from start to
finish of the first FPGA project.


DueProLogic Hardware Overview Callouts

The included Windows development environment kit includes:
Quartus II for compiling user code, assigning pins, project
setup, programming and other items. The kit also includes
the EPT ActiveHost core for the DPL, to facilitate
communication between the PC and DPL while the DPL is
running a developed project. The kit also EPT has
developed a .dll that allows Quartus II to directly
program the DPL in the same way USB-Blaster works with
other Altera populated development boards.


  • Quartus II for Windows, which is the Altera Programmable Logic
    development environment allowing for the development,
    simulation, and debugging of FPGA code by drawing logic
    schematics or by using Verilog or VHDL (and other variants)
    hardware description language (HDL), open core modules,
    and more specific Intellectual Property (IP) from EPT
    and others.
  • Within the Quartus environment, EPT supplies the EPT_Blaster.dll
    that allows Quartus II to directly program the DPL in the
    same way Altera’s USB-Blaster works with other Altera populated
    development boards.
  • The EPT GUI/Data Transfer Library .dll for Windows that allows
    applications developed with Microsoft’s Visual Studio Express (and
    others) PC application development environments, to communicate
    with the DPL at runtime using a GUI interface.
  • The EPT File Transfer core for the DPL, which is the code that
    resides within the DPL’s Cyclone FPGA to allow run-time data
    exchange with the PC.
  • The sum is a very rich development environment for the DPL. A
    comprehensive user setup and use manual and sample projects with
    code are available on the EPT website.

Configuring the FPGA

The FPGA on the DPL can be programmed with the HDL project created
by the user. Configuration is quick and easy. All that is required is a
standard USB cable with a Micro Type B connector, and the EPT Blaster
Driver DLL installed on the PC. There are no extra parts to buy - just plug
in the USB cable and connect the DueProLogic to the PC.

DueProLogic FPGA Programming

The DPL Configuration Flash is programmed using the Quartus
development environment and the EPT Blaster Driver. Once the the
Configuration Flash is programmed. A reset will cause the FPGA to begin
configuring itself using the Flash.
The board comes preloaded with Blinky, the test that each board goes
through before being shipped with conductive foam in a static-control
bag. Also included with the product is a CD with the
needed PC/Quartus/DPL drivers, library, User Manual,
Schematic (.pdf and Eagle 6.5), and sample projects, which are also
available on the EPT web site. To save expense and possibly the
environment, and because many purchasers already have a micro-USB
data cable, one is not included.
Specifications: Designed to be stand-alone and/or be mated with an
Arduino Due, LeafLabs Maple, or Olimexino-STM32 Designed to be
inserted directly into a standard breadboard, for easier prototyping
Designed with the Arduino Due/Mega shield header layout, to
accommodate 3.3v-compatible Arduino-type shields, plug-in modules EPT
offers, or modules you might develop using standard 0.1” pitch single or
double row pin headers. Designed and assembled in the USA, made to
operate at the Industrial temperature classification of 85°C, and made to
be RoHS (no Lead) compliant around the world. The DPL is made to
accept standard USB cable connection and power input of 5-15VDC, but
the header logic pins are only 3.3V compatible, like most other high-speed
products using today’s chips. To make a powerful board such as the DPL,
you can’t make it 5V-based. Applying 5V to a pin connected to the FPGA
chip will likely cause permanent damage to the FPGA chip.

DueProLogic Features:

  • The DPL’s FPGA is a 144 pin Altera Cyclone IV /E that is
    configured to operate with a 66MHz clock for synchronizing
    circuits, should you want to. With the addition of a
    supplemental oscillator, a 100MHz or other compatible
    oscillator can be added.
  • Model EP4CE6E22C8N, operating internally with 1.2V and
    2.5V, and exteranally at 3.3V being 3.3V tolerant
  • Operates corner to corner logic in 9ns
  • 392 configurable logical/logic array blocks, 6272 logical
    elements/cells, 270Kbit internal RAM, 15 multipliers to support DSP
    processing-intensive applications, 2 PLLs
  • When not powered, your last running project is stored in
    an ample 4Mb serial memory chip. The project is automatic-
    ally reloaded at power-on.
  • A board LED (labeled CONF DONE) indicates the board is
    running your project.
  • Board Layout: (pictures below)
  • The first connection you use for the PDL is the single
    micro-USB-B from your PC. It uses a full USB 2.0 (480Mb/s)
    connection through the on-board dual-engine FTDI FT2232H
    chip for both active-serial programming the Cyclone and
    8-bit wide communication with a running Cyclone
    application, allowing for high speed two-way project
    communication between the Cyclone and PC. This connection
    is considerably faster than all other known development
    boards on the market.
  • Stackable Headers surround the DPL:
  • Silkscreen labels the headers to facilitate jumper
    wire connections and positioning mini-modules
  • The headers are higher than all other board components
    so that nothing is in the way of using the headers
  • Standard Arduino shield (3.3v tolerant only) layout with
    18 pins on the headers connected to the Cyclone. (not pictured)
  • Headers match those of the Arduino Due, including its
    2x36 pin header and three center SPI header pins, having
    connection to 61 pins on the Cyclone.
  • An additional 2x40 right angle header allowing the DPL
    to be plugged directly into a standard 0.1” pitch
    breadboard, both supporting the DPL on your project board(s)
    and simplifying the wiring to your external 3.3V project-
    related components.


85-000012 DueProLogic FPGA Development System User Manual DPL_FPGA_DEV_SYS_UM.pdf
95-000012 DueProLogic FPGA Development System Data Sheet DPL_FPGA_DEV_SYS_DS.pdf
45-000012 DueProLogic FPGA Development System Project DVD DUEPROLOGIC FPGA PROJECT DVD
55-000012 Arduino Due FPGA Development System Schematics EPT-DPL-USB-FPGA-SCHEMATICS.pdf
35-000001 EPT Drivers EPT_2.08.24.ZIP


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